| 摘要 |
PURPOSE:To enable to accomplish high integration as well as to operate the titled semiconductor device at a high speed with low power consumption by a method wherein the series-connected gates of a p-channel junction type FET and an n-channel junction type FET are connected common, and each transistor is non-conductively set when it is in a normal state. CONSTITUTION:A p-channel junction type FETQ2 and an n-channel junction type FETQ1 are connected in series, and the gate of each transistor is connected common. Then, the transistors Q1 and Q2 are non-conductively set when they are in a normal state. When each channel region of the FETs Q1 and Q2 is constituted in such a manner that it is formed by controlling its thickness with which said regions will be almost filled by the depletion layer generated by a built-in voltage, both of FETs Q1 and Q2 are in a normally-OFF state. Accordingly, the title semiconductor device can be set in the state wherein it performs an enhancement movement by the signal voltage Vin to be applied to the common gate electrode, and the device can also be operated in the same manner as a CMOS. |
