| 摘要 |
To receive amplitude-keyed and frequency-shift-keyed oscillation signals, two circuit paths (PÜ, Vz1; Beg, FMD, Kom, Vz2) are provided, one of which evaluates the amplitude-keyed oscillation signals and the other of which evaluates the frequency-shift-keyed oscillation signals. The two circuit paths in each case have a delay arrangement (Vz1, Vz2). Output signals corresponding to the keyed oscillation signals are emitted from the output (B) of one delay arrangement (Vz1). Output signals corresponding to the frequency-shift-keyed oscillation signals are emitted via a combinational arrangement (GO) which is connected to the outputs of the two delay arrangements (Vz1, Vz2). <IMAGE>
|
