发明名称 COMPOSITE CONDUCTOR STRUCTURE FOR SEMICONDUCTOR DEVICES
摘要 In a semiconductor integrated circuit device the conductive layers forming interconnecting lines are of three- layer construction consisting of a polycrystalline silicon layer (541), a silicide layer (551), of silicon and a refractory metal formed on the polycrystalline silicon layer, and a refractory metal layer (561), formed on the silicide layer. The refractory metal may be molybdenum, titanium tantalum, or tungsten. The polycrystalline layer is formed by a CVD method, the silicon and refractory metal layer is formed by a co-sputtering method, and the refractory metal layer is formed by sputtering. The gates (542, 552, 562) of MISFETs present in the integrated circuit are made in the same way and of the same materials as the interconnecting lines. A dynamic RAM using such a three layer construction for word lines is described. <IMAGE>
申请公布号 GB2087148(B) 申请公布日期 1985.04.11
申请号 GB19810033069 申请日期 1981.11.03
申请人 HITACHI LTD 发明人
分类号 H01L29/78;H01L21/3205;H01L23/52;H01L23/532;H01L27/108;(IPC1-7):H01L23/52;H01L21/88 主分类号 H01L29/78
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