发明名称 DIFFERENTIAL TYPE NOR CIRCUIT
摘要 PURPOSE:To eliminate a shift in operation point and constitute a multistage logical circuit by generating a gate bias corresponding to the DC bias of a front-stage circuit connected to a multiinput gate. CONSTITUTION:The mean value of a positive-phase and an opposite phase output from terminals 11 and 16, therefore, the same DC operation point with the terminals 11 and 16 is supplied to the gate of FET3, and this circuit also operates as an LPF because of the presence of a capacitor 39. The source follower output of the logical circuit as the front stage is applied to the gates of FETs 1 and 2 to hold DC biases at the gates of the FETs 1 and 2 equal to the DC bias of the FET3, and the circuit operates correctly as a differential type NOR circuit. Even if device variables and constants such as threshold voltages of FETs and resistance values have variation, the gate biases of the FETs 1, 2, and 3 are held invariably same as far as they have variance uniformly.
申请公布号 JPS6062237(A) 申请公布日期 1985.04.10
申请号 JP19830169781 申请日期 1983.09.14
申请人 NIPPON DENKI KK 发明人 ASAZAWA HIROSHI
分类号 H03K19/0952;H03K19/094 主分类号 H03K19/0952
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