发明名称 |
Noise reduction by linear interpolation using a dual function amplifier circuit. |
摘要 |
<p>In a noise reduction circuit, a sampling pulse is generated for opening a switch in time-coincident relationship with the portion of a signal which is affected by a noise impulse. During tracking modes the signal is passed through the switch to a junction between a capacitor and a noninverting amplifier and charges the capacitor to the level of the signal. During a sampling mode the switch is open to block the signal. A feedback circuit having a plurality of time constant values is connected between the output and input of the amplifier to provide primary and secondary differentiation of the output signal of the amplifier. The feedback circuit is disabled during tracking modes to enable the amplifier to provide linear amplification of the voltage developed in the capacitor and is enabled during the sampling mode to differentiate the voltage that occurred immediately before the switch is turned off for application to the input of the amplifier for linearly interporating the noise-affected portion of the signal.</p> |
申请公布号 |
EP0136482(A2) |
申请公布日期 |
1985.04.10 |
申请号 |
EP19840109445 |
申请日期 |
1984.08.08 |
申请人 |
VICTOR COMPANY OF JAPAN, LIMITED |
发明人 |
HIROHASHI, KAZUTOSHI;ISHIGAKI, YUKINOBU;NAMIKI, YASUOMI |
分类号 |
H04B1/10;H03G3/34;(IPC1-7):H03G3/34 |
主分类号 |
H04B1/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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