| 摘要 |
PURPOSE:To obtain a ternary input circuit with simple structure and small power consumption by interposing a resistance between both drains of a P channel and an N channel transistor (TR), and regarding the common gate as an input terminal and both terminals of the resistance as two output terminals. CONSTITUTION:The resistance 9 is connected between the drains of the P channel TR2 and N channel TR1, and both terminals 6 and 3 of the resistance 9 are regarded as output terminals; and the source of the TR2 is connected to a high potential VDD, the source of the TR1 is connected to the ground side, and the gates of the TRs 1 and 2 are connected in common as an input terminal 8. When the threshold voltages of the TRs 1 and 2 are denoted as VTN and VTP respectively and an input voltage is VI, the level is L in a range VI>VTN, M in a range VTN<VI<VTP, and H in a range VI>VTP. The TR1 is off, the TR2 is on, and the outputs at the terminals 3 and 6 are both ''1'' in the range L, so that no DC current flows. Then, the TRs 1 and 2 are both on and the outputs are ''0'' and ''1'' in the range M. The TR1 is on, the TR2 is off, and the outputs are both ''0'' in the range H, so that no DC current is present. |
