发明名称 A gate array.
摘要 <p>A gate array having a plurality of basic cells (12) each comprising a transistor whose gm is as low as one fifth to one twentieth of the gm of the transistors in the conventional gate array is disclosed. The low gm is provided by reducing the W/L ratio of the gate region of the transistor. The basic cell (12) comprising the transistor of the low gm is formed to replace the conventional basic cell at a specified position in a specified basic cell array 400. The transistor of low gm reduces the basic cells necessary for constituting a delay circuit, and eliminates need for the external resistive component which is formerly requisite when a pull-up or pull-down circuit or a monostable multivibrator is built in the gate array.</p>
申请公布号 EP0136952(A2) 申请公布日期 1985.04.10
申请号 EP19840401942 申请日期 1984.09.28
申请人 FUJITSU LIMITED 发明人 MONMA, HIDEO;ISHIGURO, MASATO;KAWANO, TETSUO
分类号 H01L21/822;H01L21/82;H01L21/8238;H01L27/04;H01L27/092;H01L27/118;(IPC1-7):H01L27/02 主分类号 H01L21/822
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