发明名称 FREQUENCY DIVIDING CIRCUIT
摘要 PURPOSE:To obtain the 1/(n-1) or 1(n+1) frequency divided output signal of an external input signal by connecting the output of a 1/n frequency divider to a frequency dividing circuit output terminal, and feeding the output signal back to one of anolog multipliers. CONSTITUTION:The external input signal from an external input terminal 6 is inputted to one input terminal of an analog multiplier 8, and the output of the 1/n frequency divider 10 is inputted to the other input terminal 13 of the multiplier 8. When input signal frequencies at terminals 12 and 13 are fa and fb respectively, the output signal of the multiplier 8 contains frequency components fa+fb and fa-fb. When the component fa-fb passes through BPF9, the frequency divider 10 outputs the 1/n-frequency output to an output terminal 7 and also feeds it back to the multiplier 8. Thus, a 1/(n+1) frequency divider is obtained. When the component fa+fb passes through the BPF9, on the other hand, a 1/(n-1) frequency divider is obtained similarly.
申请公布号 JPS6062240(A) 申请公布日期 1985.04.10
申请号 JP19830168459 申请日期 1983.09.14
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 TAJIMA ATSUSHI
分类号 H03K23/58;H03K23/70;(IPC1-7):H03K23/58 主分类号 H03K23/58
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