| 摘要 |
<p>Sync-positive and sync-negative video signals appearing across load resistors (46,45) of synchronous video detector employing array of NPN transistors are coupled via respective voltage dividers (52,54;53,55) to complementary inputs of differential amplifier employing NPN transistors (57,59). Signals appearing across load resistor (58) of amplifier are coupled via an active filter (70,71,72,73) to video signal output terminal (10). Detector load circuits (45,46), amplifier load circuit (58), and active filter (70-73) each provide high frequency roll off with break point lying between desired video passband and second subharmonic of picture carrier intermediate frequency. Active filter provides response boost within high end of video passband, and response null in vicinity of picture carrier intermediate frequency. Level shift circuit (70,71,74) utilizes series resistance of active filter. Differential amplifier (57,59) has current source (60,61) responsive to amplifier output to avoid cut off of amplifier transistor receiving sync-negative drive.</p> |
