| 摘要 |
<p>PURPOSE:To inhibit the input of an ROM to a specific address by providing a gate circuit to a writing control signal line led to an EEPROM from a processor unit, and opening the gate circuit in case a signal designating a specific area does not exist on said signal line. CONSTITUTION:An AND circuit AND1 is inserted to a writing control signal line connecting a processor unit 10 and an EEPROM40, and an NOR circuit NOR1 is provided to supply address signals A6 and A7 corresponding to upper two bits of an address number. When either one of signals A6 and A7 is set at ''1'' after a certain specific area of the EEPROM40 is designated, the output of the circuit AND1 is set at ''0'' regardless of the input of a writing control signal W1. Thus the writing is inhibited. In other words, the circuit AND1 is opened only when an address signal which designates the above-mentioned area does not exist and transmits the signal W1 to the EEPROM40. As a result, the rewriting is prevented to have the validity to the noise, etc. although an address signal which should not be rewritten originally is transmitted.</p> |
