发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To obtain the titled device of small parasitic capacitance by a method wherein a contact electrode and a gate electrode are composed of the structure of lamination of a polycrystalline Si layer containing an impurity in the lower layer and a metallic film or a metal silicide layer in the upper layer, and an inner wiring electrode is composed of the structure of lamination of a polycrystalline Si layer containing no impurity in the lower layer and a metallic layer of the same condition in the upper layer. CONSTITUTION:A thick field oxide film 2 for element isolation is formed in the periphery of a P type Si substrate 1, and a thin gate oxide film 7 is adhered to the substrate surface surrounded by that film. Next, the gate electrode 5 is provided at the center of the surface of the film 7. At this time, the electrode 5 is composed of the structure of lamination of the As-doped polycrystalline Si layer 41 of the lower layer and the TaSi2 layer 3 of the upper layer. Besides, the contact electrode 12 mounted on N type source and drain regions 8 and 9 provided on both sides of the layers is put in the same structure, and the inner wiring electrode 6 positioned above the film 2 and intersecting rectangularly to those is composed of a non-doped polycrystalline Si layer 42 of the lower layer and the same TaSi2 layer of the upper layer.
申请公布号 JPS6058644(A) 申请公布日期 1985.04.04
申请号 JP19830167851 申请日期 1983.09.12
申请人 TOSHIBA KK 发明人 MOCHIZUKI TOORU;TANAKA TAKESHI
分类号 H01L29/78;H01L21/28;H01L21/3205;H01L23/52;H01L29/43 主分类号 H01L29/78
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