发明名称 Reconfigurable memory.
摘要 <p>In a reconfigurable memory a spare chip (40) is substituted for a faulty chip when an uncorrectable error condition results from an alignment of two errors in bit positions accessed through the same chip row decoder (12) while an address bit permutation apparatus (30, 32) is used to misalign faulty bits when they occur in bit positions accessed through different decoders. </p>
申请公布号 EP0135780(A2) 申请公布日期 1985.04.03
申请号 EP19840109778 申请日期 1984.08.17
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 SHAH, SIDDHARTH ROMESHCHANDRA;SINGH, SHANKER;SINGH, VIJENDRA PAL
分类号 G06F12/16;G11C29/00;(IPC1-7):G06F11/00;G06F11/20 主分类号 G06F12/16
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