| 摘要 |
<p>PURPOSE:To simplify the transfer and reading procedures of data compared with a case where data are transferred and read via a control part of a secondary microcomputer only, by connecting the memory parts of both main and secondary microcomputers to each other. CONSTITUTION:A BUSRQ signal is delivered to a control part 3a of a secondary microcomputer 3 from a control part 4a of a main microcomputer 4. Then an instruction is given to the computer 3 to open a bus line. Receiving this instruction, the part 3a answers to the computer 4 by means of a BUSAK signal. At the same time, a bus controller 5 provided to the bus line is controlled by a part of the BUSAK signal. Then the part 4a is connected to the part 3a. At the same time, a bus controller 3c in the part 3a is controlled to separate the part 3a from the bus line. Thus a memory part 3b operates as a memory part of the computer 4. This simplifies the procedures for transfer and reading of data.</p> |
