发明名称 SIMULATED INPUT AND OUTPUT DEVICE
摘要 PURPOSE:To transfer continuously plural data and to access to an optional address of a register by providing a memory part which holds plural transferred data, a mode register and a multiplexer. CONSTITUTION:A memory part 10 consists of plural memory parts holding data. A mode register 4 decides the 1st method which access to the memory parts successively or the 2nd method which access at random to the memory parts with the address information supplied from outside to access to the memory part. In other words, it is possible to transmit continuously data of different contents with addition of the part 10. Then using the register 4 makes it possible to use a memory part with both methods. Furthermore a memory part is formed in the depth direction to an input/output addressive an address counter 6 and an address bus (b) by means of a multiplexer 9. Thus it is possible to transfer plural data continuously and also to access to an optional address of a register.
申请公布号 JPS6057452(A) 申请公布日期 1985.04.03
申请号 JP19830166409 申请日期 1983.09.08
申请人 MATSUSHITA DENKI SANGYO KK 发明人 NAGATOMI KAZUYASU
分类号 G06F11/22;G06F13/10;H04L29/14 主分类号 G06F11/22
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