Semiconductor integrated circuit devices with protective means against overvoltages

摘要

An additional N+ region is provided in a P type substrate adjacent to a protective N+ resistor region with an insulating layer and metal layer interposed between the N+ region and the N+ resistor region. The N+ resistor region, the oxide layer, the polysilicon layer and N+ region constitute an MOS transistor, respectively corresponding to a drain region, a gate insulating layer, a gate electrode and a source region of the MOS transistor. When a very high excessive voltage that otherwise would destroy the PN junction between the substrate and the resistor region is applied to the input terminal, the MOS transistor is rendered conductive and the excessive voltage is absorbed.