| 摘要 |
PURPOSE:To prevent the short channel effect by effective improvement of the drain withstand voltage by a method wherein a pocket region is formed after the part of the side wall of a gate electrode is selectively removed by etching. CONSTITUTION:When a plasma SiO2 film 17 is deposited over the entire surface after formation of gate electrodes 151 and 152 and CVD oxide film patterns 161 and 162, and this film is successively etched, the part of the side wall of the gate electrode is selectively etched. Next, B<+> and P<+> are ion-implanted to a well region 12 and on a substrate, respectively, with the films 17 as a mask. Then, N type pocket regions 22 and 22 are formed in the neighborhood of the gate electrode 151, and P type pocket regions 25 and 25 in the neighborhood of the gate electrode 152, respectively. Thereby, the speed does not decrease because of no increase in resistances of the source and drain regions. |
