发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To reduce the unidirectional size of a chip by forming wirings for controlling a Y decoder of a material which is different from that for forming a cell when forming X-, Y-drivers parallel to each other to select a specific bit in a memory array made of X, Y matrix, and passing through the array. CONSTITUTION:A memory array AR which is formed of X, Y matrix is formed on a chip CHIP, a power source voltage VCC, and VSS are applied thereto, and timing signals are respectively applied from timing generators TMG1, TMG2. Then, X decoders X0-X3 and Y decoders Y0-Y3 of matrix shape parallel to each other in the array AR are provided, and switches SW0-SW3 are respectively connected to the decoders X0-X3, and the switches are selectively driven by Y driver DRV. In this structure, the wirings YC0-YC3 of the Y driver DRV are formed of a material different from that of the AR, and the size of the width of the CHIP can be reduced without any replacement in the passage in the AR.
申请公布号 JPS6054471(A) 申请公布日期 1985.03.28
申请号 JP19830161838 申请日期 1983.09.05
申请人 HITACHI SEISAKUSHO KK 发明人 ITOU KIYOO;HORI RIYOUICHI
分类号 G11C11/413;G11C5/02;G11C5/06;G11C7/10;G11C8/12;G11C11/401;G11C11/41;H01L21/822;H01L21/8242;H01L27/04;H01L27/10;H01L27/108 主分类号 G11C11/413
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