| 摘要 |
PURPOSE:To attain a high-speed check system with a simple circuit by synchronizing an in tag signal and an out tag signal with a control clock to count the signals with an up/down counter and detecting the difference when data transfer is terminated. CONSTITUTION:The In Tag signals 1 and 2 are inputted to in tag signal synchronizing circuits 10-1 and 10-2 and are synchronized with a control clock signal Clock, and the outputs are given to an exclusive OR circuit 14 through an OR circuit 12. Similarly, the Out Tag signals 1 and 2 and an Out Stop signal are inputted to out tag signal synchronizing circuits 11-1-11-3 and are synchronized with the control clock signal Clock and are supplied to the exclusive OR circuit 14. The output of the circuit 14 and the control clock signal Clock are inputted to an AND circuit 15, and the output is used as a clock input of an up/down counter 16. When the output of the OR circuit 12 coincides with the output of an OR circuit 13, the up/down counter 16 is not operated, and the output is inputted to an AND circuit 18 through NOT circuits 17-1-17-4, and an output DIFO becomes ''1''. |
