发明名称 SPEED DETECTING DEVICE
摘要 PURPOSE:To output digital quantity corresponding to rotary speed simply and quickly, by counting the digital quantity corresponding to the rotary speed by a subtraction counter, multipliers and the like, at every time the time interval of a pulse signal is finished. CONSTITUTION:The rise of pulses having a time interval, which is inversely proportional to a rotary speed, from a rise-up detecting circuit 7 is detected. Preset of an n-bit subtraction counter 9 and reset of an FF10 are controlled. When the counter 9 counts the clocks up to 2n times, the FF10 is set, an n-bit subtraction counter 12 is preset, and the output of the counter 12 is applied to n-bit multipliers 13 and 14, which count the clocks in two-stage cascade. Then, the output of the multiplier 14 is applied to the counter 12 as a subtraction input. At a time when the next pulse signal is obtained, the output of the counter 12 is sent out as the digital quantity, which is proportional to the rotary speed. In this constitution, the digital quantity corresponding to the rotary speed can be outputted simply and quickly without computing the inverse number and the like by a microcomputer.
申请公布号 JPS6053852(A) 申请公布日期 1985.03.27
申请号 JP19830160385 申请日期 1983.09.02
申请人 HITACHI SEISAKUSHO KK 发明人 ISOBE MITSUNOBU
分类号 G01P3/489 主分类号 G01P3/489
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