| 摘要 |
PURPOSE:To obtain the titled converter using a high-speed AD converter with low resolution and utilizing the advantage of the high speed to improve the resolution by providing a level shift circuit, a sample-and-hold circuit, a sequential comparison AD converter, a high-order converting means and a selector of the specific design respectively. CONSTITUTION:After one analog signal is separated into plural analog signals having different DC levels by plural level shift circuits 2-5, they are subject to sample-and-hold by sample-and-hold circuits 6-9. The analog signal is subject to AD conversion by sequential comparison AD converters ADC 10-13 respectively and high-order AD conversion data is obtained from a high-order converting means 15 by using the AD conversion data to discriminate whether or not the ADC is in scale-out. Then a selector 16 changes over an output line of the ADC 10-13 to obtain low-order AD conversion data. Thus, the converter is constituted at high speed with high resolution, compactness and low cost.
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