ERROR CONTROL SYSTEM

摘要

PURPOSE:To attain error correction with high efficiency by applying parity check to high-order m bits of A/D conversion data in the period of carrier and replacing the high-order m bits with an average value just before and after the carrier period only to the high-order m bits of a block from which an error is detected. CONSTITUTION:An O/E converter 12 converts an optical signal into a PCM signal and a PLL13 extracts a synchronized clock signal. A serial-parallel converting element 17 inputs the PCM signal and converts synchronous information F' and a signal from A/D1-A/D9 into a parallel signal. An exclusive OR element 18 checks the parity and an exclusive OR element 22 detects whether the result of parity check is coincident or dissident. When the parity is dissident, the high-order 4 bits are replaced into the average value between the high-order 4 bits just before the period and the high-order 4 bits just after the period.