| 摘要 |
PURPOSE:To reduce the series resistance of sources and to shorten the manufacturing steps of a high frequency Schottky barrier gate type FET by forming source, drain and gate electrodes in a self-alignment and using the same material for the metal for the electrode. CONSTITUTION:Si<+> ion implanted layer 12' is formed on the surface layer of a semi-insulating GaAs substrate 11, and a Ge layer 18 and an SiO2 film 19 are laminated and covered thereon. Then, a photoresist film 10 having a hole 10a is formed on the film 19, a hole 19a perpendicular to the film 19 is opened by reactive ion etching, and an overetched hole 18a is opened by plasma etching at the layer 18. Subsequently, the film 10 is altered to the film 10 for blocking the hole, the exposed portion of the film 19 is removed by etching, As<+> ions are implanted to the layer 12' to activate it, and an operation layer 12 is formed in the layer 12'. Then, a source electrode 6, a drain electrode 17 and a gate electrode 15 made of a Ti layer 21 and an aluminum layer 22 are attached on the layer 18 and the layer 12 interposed therebetween. |
