发明名称 AD CONVERTER OF SUCCESSIVE COMPARISON TYPE
摘要 PURPOSE:To improve DNL characteristics and precision by shifting the code output of an AD converter and dropping lower bits of the code output to obtain a prescribed data output. CONSTITUTION:An analog input VIN and an offset voltage EOS are inputted to an adding circuit 2, and the output is outputted to an M-bit AD converter 1. A digital memory 3 shifts a code output (p) of the AD converter 1 by number of codes except 2<n> (n is the number of unused bits) and converts the shifted code output to data consisting of a prescribed number N of bits and outputs this data as a data output (q) (M=N+n). Data outputs whose lower one bits are dropped after one code shift are shown in a table. Since the number of used bits is reduced (lower bits are dropped) after one code shift, there are certainly a pair of data outputs having a reat difference in bit pattern in one group. Consequently, positive and negative nonlinear errors in this part are cancelled by each other to improve DNL characteristics.
申请公布号 JPS6051332(A) 申请公布日期 1985.03.22
申请号 JP19830160023 申请日期 1983.08.30
申请人 HORIBA SEISAKUSHO:KK 发明人 TANAKA MASARU;YOSHIDA NATSUKI
分类号 H03M1/08;H03M1/10;H03M1/38;H03M1/46;(IPC1-7):H03M1/38 主分类号 H03M1/08
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