| 摘要 |
PURPOSE:To reduce the parasitic capacitances of layers by a method wherein a thermal oxide film, a conductive layer, and a relatively thick insulation layer are laminated on an Si substrate and thereafter selectively removed, a thermal oxide film being provided on the exposed substrate and the end of the conductive layer, and a conductive layer being then provided on the relatively thick insulation layer. CONSTITUTION:A thick film 202 and a thin film 204 are formed on the Si substrate 200, and a poly Si 206 and a PSG208 of high impurity concentrations are superposed and successively etched in a selective manner, resulting in the exposure of the substrate 200. On heating in O2, thermal oxide films 218 and 216 are formed at the end of a poly Si wiring 212 and on the surface of the substrate 200. They are covered with a poly Si 202 of a high impurity concentration and then selectively etch-removed, and accordingly poly Si wirings 222 and 224 are formed. This construction enables separation between the first and second wiring layers by means of an insulation thick film; therefore the parasitic capacitances of the wiring layers reduce, and then the speed-up of the device is enabled. |
