| 摘要 |
Adaptive equaliser for one or more incoming (x,y) amplitude modulated (QAM) signals. The signals are fed through a chain of delay circuits (T) which have coefficient decision circuitry (KE) connected at the delay circuit input/output points to produce coefficient multiplier signals (a1,b1,...an,bn). The coefficient signals are fed into summation circuits (S1,S2) in the main Transversal Filter (TF) unit. The summation output (u,v) is fed to a decision circuit and an error signal (Fa,Fb) feedback input to the coefficient decision circuit (KE) enables an evaluation threshold limit to be applied (B1,B2) to maintain the circuitry within an operating range.
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