| 摘要 |
PURPOSE:To improve the yield and quality of IC comprising compound elements by a method wherein both arsenic diffusion and field oxide film formation on a gate electrode are processed at high temperature. CONSTITUTION:An N<+> type buried layer 2 is formed on the bipolar transistor forming region II of a P type silicon substrate 1 and an N type layer 3 with 2- 3mum thickness is epitaxially grown on the buried layer 2 and then thin silicon dioxide film 4 is produced on the silicon layer 3. Firstly a P type element separation band 5 and N<+> type collector contact layer 6 are formed on the bipolar transistor forming region I by heattreatment process. Secondly the silicon dioxide film 4 is coated with nondope polycrystalline silicon film and after ion-implanting arsenic, a gate electrode 7 on the MOS transistor forming region II is formed. Thirdly overall surface is coated with silicon nitride film 8 for patterning process. Fourthly silicon field oxide films 9 are formed and finally a P type base region 10, P type source region and drain region 11 may be simultaneously formed. |
