发明名称 POLARITY COINCIDENCE CIRCUIT
摘要 PURPOSE:To obtain a polarity coincidence circuit with less voltage drop by connecting properly two each N-channel transistors (TRs) and P-channel TRs respectively. CONSTITUTION:An input terminal L1 is connected respetively to an emitter of the N-channel TRQ1 and an emitter of the P-channel TRQ4 and an input terminal L2 is connected to an emitter of a P-channel TRQ2 and to an emitter of the N-channel TRQ3 respectively. Further, a collector of the TRs Q1, Q3 is connected to a positive terminal of a load R having a voltage polarity and a collector of the Q2, Q4 is connected to a negative terminal of the said load R respectively. Moreover, a base of the Q1 is connected to a positive terminal of a constant current diode CD1, a negative terminal of the CD1 is connected to a terminal of a resistor R1, and the other terminal of the resistor R1 is connected to a base of the Q2. Furthermore, a base of the Q3 is connected to a positive terminal of a diode CD2, a negative terminal of the CD2 is connected to a terminal of a resistor 2 and the other terminal of the resistor R2 is connected to a base of the Q4.
申请公布号 JPS6048692(A) 申请公布日期 1985.03.16
申请号 JP19830157392 申请日期 1983.08.29
申请人 FUJITSU KK 发明人 OSAJIMA MASAHIRO
分类号 H04Q1/20;H04M3/22;H04M19/08 主分类号 H04Q1/20
代理机构 代理人
主权项
地址