发明名称 DATA PROCESSOR
摘要 PURPOSE:To reduce the load of the software by using a control circuit as well as a data transfer instruction to shift optionally data from the present position with a single instruction. CONSTITUTION:When a shift indicator 2 indicates the R (right) direction and the lower-to-upper address direction, the head address of the transfer data obtains (b) from the contents of a register 1 having a memory address by adding -1 to the contents of a register 4. The reading processing is carried out successively toward the direction (a) from said (b). Then the head address of the transfer destination area obtains the address of (b) as described above and then obtains (b+c) with addition of the value of a shift counter 3. The data are transferred successively from the direction (b+c) to (a+c) of a memory area. The number of transfer bytes is controlled by the contents of the register 4 and the data sent to (b) from (a) are transferred to (b+c) from (a+c). While the (b) is also obtained in the same way by subtracting the value of the counter 3 from the register 1 even in case the indicator 2 indicates the L (left) direction and the upper-to-lower address direction.
申请公布号 JPS61256439(A) 申请公布日期 1986.11.14
申请号 JP19850097728 申请日期 1985.05.10
申请人 HITACHI LTD 发明人 KADOTA HIROSHI
分类号 G06F7/00;G06F5/01 主分类号 G06F7/00
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