发明名称 EMITTER COLLECTOR COUPLED LOGIC
摘要 The reference portion of a primitive current switch (QA, QB, and QR) used in emitter coupled logic or current mode logic is modified by introducing a slow device (QRR) as the reference element in order to enhance the speed of turn on and turn off of the input elements (QA and QB). In particular, the reference transistor (QR) of a conventional ECL inverter gate or conventional CML inverter gate is replaced with a slow transistor or slow diode (QRR) in order to bypass the emitter dynamic resistance. The emitter time constant of the reference QR is thereby increased so that the voltage on the common source node (node 3) does not change substantially when the base of the input elements change transiently. As a consequence, the collector output of the input element, such as transistor QA is switched on or off significantly faster.
申请公布号 WO8501166(A1) 申请公布日期 1985.03.14
申请号 WO1984US01427 申请日期 1984.09.06
申请人 ADVANCED MICRO DEVICES, INC. 发明人 VARADARAJAN, HEMMIGE, D.
分类号 H03K17/04;H03K17/60;H03K19/013;H03K19/086;(IPC1-7):H03K19/086;H03K17/16 主分类号 H03K17/04
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