| 摘要 |
<p>For the direct coupling of a plurality of single chip microprocessors (1) to a common address-data bus (2), the occupation of the address and data bus is monitored and controlled. To this effect, all the single-chip microprocessors (1) are connected by a bus request line (4), a bus busy line (5) and a reset line (6) to a time monitoring unit (7). The data transfer may be carried out between the single-chip microprocessors (1) directly or via a source and a data output coupled to the address-data bus (2).</p> |
