发明名称 PROGRAM CHECKING CIRCUIT
摘要 PURPOSE:To reduce a checking time and the man power and also to improve the reliability of checking results, by providing a history memory circuit, a history memory control circuit, etc. for tracking of execution of each instruction. CONSTITUTION:The history information showing whether each instruction is actually executed is recorded to a history memory circuit 8 by a career memory control circuit 6. In other words, the address of an instruction that is read out of a program memory 2 and executed by a microprocessor MPU1 is recorded to the circuit 8 in an execution mode. When the execution of a program is over, then tracked and checked. In this case, the execution mode is switched to a read mode to read out the address out of the memory 2. Then the execution of the program is tracked and checked by the history information corresponding to the read-out address. In such a way, the history information is checked via circuits 6 and 8, etc., and reduces the checking time and the man power in tracking and check of programs, and also improves the reliability of checking results.
申请公布号 JPS6045849(A) 申请公布日期 1985.03.12
申请号 JP19830153299 申请日期 1983.08.24
申请人 HITACHI SEISAKUSHO KK 发明人 KUBOTA KAZUMI;HIRAHATA SHIGERU
分类号 G06F11/28;G06F11/36 主分类号 G06F11/28
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