发明名称 VERTICAL P-N-P TRANSISTOR
摘要 PURPOSE:To obtain the title device which requires no connection of resistors and incorporates a base resistor in the same chip by a method wherein a P type resistance region surrounded by N-regions is formed in a P type substrate and then made as the base resistor by being connected to the base region. CONSTITUTION:To P-regions 4 and 5 are formed in the N-regions 2 and 3 in the P type Si substrate 1, and the base resistor is constructed of a P-region 5 with a P- region 1 as the collector region, an N-region 2 as the base region, and a P- region 4 as the emitter region. An electrode 9 is connected to an emitter terminal E, an electrode 6 to a base terminal B, and an electrode 10 to a collector terminal C via P<+> layer 11, resulting in the construction of this transistor incorporating the base resistor 12. An electrode 13 contacting the N-region 3 via N<+> region 31 is connected to the emitter terminal E, a reverse bias being impressed between the N-region 3 and the P-region 5, and the parasitic effect of the transistor composed of the P-region 5, N-region 3, and P-region 1 being then removed.
申请公布号 JPS6045061(A) 申请公布日期 1985.03.11
申请号 JP19830152742 申请日期 1983.08.22
申请人 FUJI DENKI SEIZO KK 发明人 HIROHASHI OSAMU
分类号 H01L27/04;H01L21/331;H01L21/822;H01L29/72;H01L29/73;H01L29/732 主分类号 H01L27/04
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