发明名称 TELEVISION RECEIVER
摘要 PURPOSE:To obtain a pattern without jitter even when a locked sampling clock is used for a burst signal by controlling a sampling clock in phase with the output of a horizontal phase difference detecting circuit detecting the phase difference between a horizontal pulse and an inputted synchronizing signal. CONSTITUTION:A phase control circuit 14 is inserted to the output terminal of a voltage controlled oscillator 7, the horizontal phase error data obtained through a low pass filter 12 controls the sampling clock in phase to match the phase between the luminance signal and the horizontal synchronizing signal, an operation device 15 separating a color difference signal from a comb line filter 2 into an R-Y signal and a B-Y signal is inserted, the hue is controlled by supplying a horizontal phase error data to the operation device 15 to correct jitter of the hue. The horizontal phase detecting circuit 9 consists of a circuit multiplying the synchronizing signal with the horizontal pulse and a phase error data with high luminance is obtained from the sampling interval. A phase control circuit 14 consists of transistor gate connected in series and the phase is adjusted minutely by utilizing a delay time of the gates to control the number of stages in series by means of phase information.
申请公布号 JPS6042996(A) 申请公布日期 1985.03.07
申请号 JP19830152045 申请日期 1983.08.19
申请人 MATSUSHITA DENKI SANGYO KK 发明人 YAMAGUCHI NAMIO
分类号 H04N9/44;H04N9/45 主分类号 H04N9/44
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