| 摘要 |
PURPOSE:To set a specific internal logical circuit to a desired state by using a steady-state logical output of an integrated logical circuit device as a clock to convert an input signal from an output terminal into a latched state setting internal signal. CONSTITUTION:When a state setting external signal phi is inputted to an output terminal 4, a logical output B holds, e.g., ''0'' logical output independently of a steady-state logical output A, an output K of a latch circuit D-FF9 has temporarily a 0 output different from the state that the semiconductor integrated logical circuit device 1 performs the steady-state operation and is converted into a different state setting internal signal. Thus, an FF frequency divider 7 is reset simultaneously from the frequency dividing operation and set to the initial state. |
