发明名称 TIMER DEVICE MOUNTED ON SATELLITE
摘要 PURPOSE:To improve the reliability by constituting triply a clock signal generating section, a counter section and a program section to obtain an output from a majority decision gate circuit. CONSTITUTION:When a signal for two systems' share from clock signal generating sections 1a-1c formed as a triple system is outputted respectively via majority decision circuits 7a-7c, the majority decision is applied by the 2nd majority decision gate circuit 7d via counter sections 2a-2c and program sections 3a-3c, and a control signal is outputted to a load side by a decode section 8 and an output section 4. The control signal is outputted normally even if one optional system of the input is missing, and no output is given out of the majority decision gate circuit even if any of the systems mulfunctions as runaway or the like, then the high reliability is attained.
申请公布号 JPS6041818(A) 申请公布日期 1985.03.05
申请号 JP19830149792 申请日期 1983.08.17
申请人 MATSUSHITA DENKI SANGYO KK 发明人 SEKI TOSHIO;KIKUCHI TAKESHI
分类号 B64G1/66;H03K17/28 主分类号 B64G1/66
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