发明名称 TIMING SIGNAL EXTRACTING CIRCUIT
摘要 <p>PURPOSE:To eliminate the noise mixed in an input timing signal by opening a gate circuit passing through the input a timing signal with a signal frequency- dividing an output of a fixed oscillator and detecting an output of the gate circuit to close the gate circuit. CONSTITUTION:The frequency divding circuit 8 frequency-divides an output signal of the fixed oscillator 7 and outputs a control signal D to open a gate circuit 15 to which the timing (TM) signal is inputted allowing to pass through the TM signal and its output signal B resets the circuit 8. A detecting circuit 16 detects the passing of the TM signal at the same time and a detection signal E inhibits the passing of an input signal A of the circuit 15. Thus, a signal C eliminating noises 11, 12 mixed in the input TM signal A and synchronized with the TM signal 10 is outputted from a terminal 9 via the circuit 8. Further, the state before missing of a TM signal 13 in the input signal A is kept by the frequency divider circuit 8 and an internal timing signal 14 is generated.</p>
申请公布号 JPS6039948(A) 申请公布日期 1985.03.02
申请号 JP19830149026 申请日期 1983.08.15
申请人 SUWA SEIKOSHA KK 发明人 IKEJIRI HIROAKI
分类号 H04N5/08;H04L7/00;H04L7/027 主分类号 H04N5/08
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