发明名称 MULTILAYER INTERCONNECTION STRUCTURE
摘要 PURPOSE:To improve the adhesive property of the upper layer wiring and to upgrade the reliability of multilayer interconnection techniques by a method wherein the steep step-difference forms of the base wiring are eased by burying the lower layer wiring in the upper surface part of the base insulating film and the interlayer insulating film located at the upper part of the lower layer wiring is flatened. CONSTITUTION:A first-layer wiring 11, which has been electrically connected with the prescribed semiconductor regions and has been provided in such a way as to bury groove 8 parts therein, is mainly one provided for electrically connecting the prescribed semiconductor elements with one another. As the steep step-difference forms of the side parts thereof have been buried in an insulating film 6, the upper surface parts of the step-difference form parts have been flattened. Like this, this multilayer interconnection structure has been contrived in such a way that the adhesive property of a second-layer wiring is made to upgrade. A second-layer insulating film 12, provided in between the first-layer wiring 11 and the second-layer wiring, is one provided for electrically isolating the two wirings. As the first-layer wiring 11 has been buried in the insulating film 6, the upper surface part of the insulating film 12 has been flatened. By such a method, this structure has been designed in such a way that there exists no steep step-difference form that will be brought about by the first-layer wiring 11.
申请公布号 JPS6038837(A) 申请公布日期 1985.02.28
申请号 JP19830146347 申请日期 1983.08.12
申请人 HITACHI SEISAKUSHO KK 发明人 KANAI FUMIYUKI;ITAGAKI TATSUO
分类号 H01L21/3205;(IPC1-7):H01L21/88 主分类号 H01L21/3205
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