发明名称 APPARATUS FOR TESTING SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To reduce troubles such as connection inferiority, by preliminarily connecting all terminals to the test circuit of a test apparatus, and connecting the power source for a specimen of the test apparatus to the power source terminal of a semiconductor integrated circuit to be tested in a detachable manner. CONSTITUTION:All of nodes 2 guided from the terminals of an IC socket 1 are connected to pin electronics 3 by wirings 12 preliminarily formed in a printed patern. Nodes 13, 14 respectively guided from a power source 9 for a specimen and an earth wire 10 for IC to be tested are not connected to either one of the nodes 12 at the beginning but connected thereto corresponding to the arrangement of the power source terminal and earth terminal of IC to be tested by performing additional wiring as shown by numerals 15, 16 to the nodes 2 communicated with the power source terminal and clad terminal of IC to be tested by using, for example, known detachable pin connectors. By this mechanism, the frequency of the attachment and detachment of a connection apparatus is reduced and troubles such as connection inferiority can be reduced.
申请公布号 JPS6038666(A) 申请公布日期 1985.02.28
申请号 JP19830145927 申请日期 1983.08.10
申请人 NIPPON DENKI KK 发明人 MATSUOKA EIKI
分类号 G01R31/28;H01L21/66 主分类号 G01R31/28
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