| 摘要 |
PURPOSE:To eliminate the need for etching an inter-layer insulating film between a first gate and a second gate, to reduce capacitance between layers and to increase the speed of operation of an element by preventing the generation of an overhang shape through which second gate electrode wirings are easy to be mutually short-circuited. CONSTITUTION:A pattern 301 is used as a mask pattern etching SiO2 in 35nm in a memory cell section, and the surface is etched while protecting SiO2 in regions except a second gate region in the memory cell section and a peripheral circuit region. A stepped section 401 in an SiO2 section is formed by the mask at that time. An overhang is not shaped around a first gate at that time, poly Si is not left even through anisotropic etching in the processing of a second gate, and second gate electrode wirings are not short-circuited mutually. |
