ERROR RATE OBSERVING DEVICE

摘要

PURPOSE:To attain the error rate observation in parallel and in plural delay time states to shorten an observing time by providing plural secondary separator circuits in addition to a main separator circuit and detecting the dissidence of the output between the main and secondary separator circuits. CONSTITUTION:A read data pulse 58 is converted into data strobes 510-512 having different delay times by a delay device 6. The phases of these strobes are arranged by a read clock 59 synchronous with the pluse 58 and via a main separator circuit 7 and secondary separator circuits 8 and 9 respectively. A standard separate data 513 given from the circuit 7 is supplied to a detecting circuit 12 together with the clock 59. Then a standard error pulse 516 and a check clock 517 are produced from the circuit 12. At the same time, the dissidence is detected by exclusive OR gates 10 and 11 between the data 513 and secondary separator data 514 and 515 delivered from circuits 8 and 9. Therefore a parallel observation is possible in plural delay states with no serial processing by changing the delay time. Thus the error rate observing time is shortened.