| 摘要 |
In many applications of electronic inverters, especially in applications involving inversion of relatively high levels of power, it would be desirable to use full-bridge inverters rather than half-bridge or regular parallel push-pull inverters. In its preferred embodiment, subject invention constitutes a self-oscillating inverter circuit based on a full-bridge configuration of four switching transistors. Positive feedback and avoidance of commutation overlaps are accomplished by using four non-coupled saturable current transformers-one such transformer for each transistor. By arranging for two of these saturable transformers to require fewer volt-seconds for saturation than do the other two transformers, coupled with the use of a shunt-connected inductor across the output, the inverter output voltage-rather than being a simple squarewave-is made to alternate between three magnitude levels: a maximum negative voltage level, a zero voltage level, and a maximum positive voltage level. The resulting output voltage has fewer harmonic components than do the simple squarewave. By having the zero voltage levels occupy approximately one third of the total time of the net resulting output voltage cycles, a minimum of harmonics results.
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