| 摘要 |
Apparatus for extracting synchronizing information from an incoming serial-bit digital television signal formed of a sequence of data blocks, each block formed of N n-bit words and including within each block a predetermined serial group of m bits forming the synchronizing information, which identify each block of information and enable de-serialization of said signal. The apparatus comprises a first m-stage shift register through which the incoming digital signal is stepped at the bit rate of the incoming digital signal, and which supplies a pulse whenever it holds a predetermined serial group of m bits, a frequency divider to derive from the incoming digital signal a word rate clock pulse signal. Additionally, the apparatus comprises an n-stage shift register through which each said pulse is stepped at the bit rate of the incoming digital signal, a latch circuit synchronized with the word rate clock pulse signal to derive n-bit phase words the bits of which correspond respectively to the conditions of the n stages of the shift register, comparators comparing each phase word with at least one other phase word delayed N or an integral multiple of N word periods of an earlier incoming digital signal. Comparators supply a control signal only when at least one of the comparisons indicates two phase words which are identical and both contain a bit corresponding to a said pulse, wherein the position of this bit in the phase words indicates the phasing of the word rate clock pulse signal relative to the words of the incoming digital signal. In addition, circuits are provided to deserialize the incoming digital signal into parallel-bit n-bit words under control of the control signal. |
