发明名称 INTER-MICROPROCESSOR DATA TRANSFERRING SYSTEM
摘要 PURPOSE:To simplify a device, to prevent a halt of a processing, etc., and to obtain advantageous program constitution by executing simultaneously a periodic interruption with regard to all microprocessors, when transferring a data between plural microprocessors. CONSTITUTION:Each microprocessor 1, 2 and 3 usually executes a data processing, respectively, but a periodic interruption is executed by detecting a rise of an 8ms clock pulse generated from clock pulse generators 5, 6. That is to say, all microprocessors execute simultaneously a periodic interruption program for controlling a data transfer between the microprocessors. By this periodic interruption program, whether the data transfer is necessary between each other or not is decided, and when it is necessary, the processing is ended after the data transfer of a prescribed quantity. In this way, the data transfer is executed by a common 8ms period to constitute advantageously a program and improve the stability of a system.
申请公布号 JPS6033654(A) 申请公布日期 1985.02.21
申请号 JP19830142789 申请日期 1983.08.04
申请人 NIPPON DENKI KK;NIHON DENKI ENGINEERING KK 发明人 ISHII KENJI;ISHIKAWA AKIRA
分类号 G06F15/16;G06F15/17;G06F15/177 主分类号 G06F15/16
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