| 摘要 |
<p>An RMS converter has first and second transistors (40a and 42a) providing a signal representing double the log of the input voltage, a third transistor (40b), matched with the first (40a), providing a signal representative of the log of the output voltage and a fourth transistor (42b), matched with the second (42a), providing a signal representative of the anti-log of the ratio of those signals; the transistors in each matched pair are repetitively interchanged functionally thereby reducing errors caused by slight differences in the transistor operating characteristics.</p> |
