发明名称 Frequency modulated phase locked loop
摘要 A phase locked loop is frequency modulated by means of a modulation signal applied to the loop filter thereof. The circuit is designed with two time constants, one of which determines the square wave modulation response thereof and the other the loop settling time. Each of these time constants is chosen to optimize the loop modulation response and the loop settling time.
申请公布号 US4500857(A) 申请公布日期 1985.02.19
申请号 US19830469333 申请日期 1983.02.24
申请人 THE UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE ARMY 发明人 BOSSELAERS, ROBERT J.;ELDER, RICHARD B.
分类号 H03C3/09;H04L27/12;(IPC1-7):H04L27/12 主分类号 H03C3/09
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