| 摘要 |
PURPOSE:To facilitate the analysis of a cause of an erroneous operation due to a malfunction of an LSI by controlling external input data outputted from a data control circuit and timing information outputted from a timing control circuit in response to the simulated result of a function simulator by a terminal data output circuit, thereby simplifying the manufacture of the timing information. CONSTITUTION:An evaluating chip 3 operates in accordance with a terminal data of a terminal data output circuit 2, external input data necessary for the chip is inputted, and the result of the internal processing is outputted to the terminal. This terminal data is sampled by a terminal data input circuit 1 on the basis of basic periodic timing information. The sampled chip terminal data is processed on the basis of the timing information of the control terminal, and compared with the output data of a function simulator by a data comparator 7. If the data is coincident by this comparison, the comparing operation is continued, and if a malfunction occurs so that the data do not coincide, the simulator 4 is constructed to hold simulation information of an LSI chip, compare, stop and hold the state that the information is generated. |
