| 摘要 |
PURPOSE:To enable to control a drain current of an FET by inactivating part of an active layer by ion implanting method or the like, thereby shortening the gate width to the desired width. CONSTITUTION:An active region 12 of a D-FET, an active region 13 of an E- FET, a source region 14 and a drain region 15 are formed by using a suitable ion implanting mask and a selective ion implanting method on a semi-insulating GaAs substrate 11. Then, a source electrode 16, a drain electrode 17 and a gate electrode 18 are formed by a photoetching method and a metal lift-off method. Thereafter, after protons are implanted, a high resistance GaAs layer 19 is formed by heat treating, the gate width of the E-FET is reduced, thereby setting the ratio of the drain current of the E-FET to that of the E-FET, D-FET to the desired value. |
