发明名称 DATA BUFFER DEVICE
摘要 PURPOSE:To simplify the output control of a data memory by using the same channel for input data to a buffer memory. CONSTITUTION:An address from an address counter 44 for input is supplied through an address selector 45 synchronously with an input mode period corresponding to a command signal of a control circuit 20, and then mn pieces of data of the same channel are stored in the same addresses of respective memory elements 41-1-41-mn from a data memory 10. Further, data is outputted in a period T with the output of an address counter 46 for output. Thus, a chip selector 42 for input is advanced by mn in the period T and the address counter 46 for output is advanced by (n) to perform input/output control over the data.
申请公布号 JPS6030231(A) 申请公布日期 1985.02.15
申请号 JP19830138835 申请日期 1983.07.29
申请人 TOSHIBA KK 发明人 TAKAHASHI YASUO
分类号 H04J3/06;G06F5/06;G06F5/10;H04L13/08 主分类号 H04J3/06
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