发明名称 ADDRESS CONTROL SYSTEM
摘要 PURPOSE:To handle two-dimensional data at a high speed and alter easily the dimension such as a longitudinally long, a laterally long, and a square shape, etc., by performing DMA (dynamic memory access) transfer in an optional rectangular area in a linear memory by one-time parameter setting and starting. CONSTITUTION:Data DELTA(x), P(x), P(y), and DELTA(y) on an image are inputted from a bus 16 to initial value registers 5-7 and a counter 14. The starting point of the image is indicated with the initial value of the data P(x) and P(y), the data DELTA(x) is counted 10 with a clock signal, and the address of the data P(x) is counted 11; once X-directional DMA is completed, an Y-directional shift is made, and the X-directional DMA is repeated until the DELTA(y) counter 14 attains to a specific value. Then, the X and Y position and ratio X/Y are indicated to a shifting circuit 8 and a decoder 13 with the output of an X and Y size control register 9. The outputs of P(x) and P(y) address counters 11 and 12 and the output of a decoder 13 are multiplexed 15 to alter the longitudinal/lateral ratio of a rectangle at a high speed.
申请公布号 JPS6029855(A) 申请公布日期 1985.02.15
申请号 JP19830138276 申请日期 1983.07.28
申请人 FUJITSU KK 发明人 OKA YASUKATSU;ISHIZU TAKAYUKI;FUKUNISHI SHIYUNSAKU
分类号 G09G5/00;G06F12/00;G06F12/02;G06F12/06;G06T1/60;G06T3/00;G09G5/34 主分类号 G09G5/00
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