发明名称 CODE CONVERSION SYSTEM FOR DELTA MODULATION
摘要 PURPOSE:To reduce the amount of effective data on a transmission line and in data storage by employing code conversion for compressing data, and decreasing the sending speed of an output code. CONSTITUTION:A block code converting circuit 16 composed of a coder circuit or memory circuit is used for a delta modulation system or adaptive delta modulating encoder 1, and quantized codes which are inputted in sequence are held temporarily in (n)-bit blocks, which are outputted as (n-1)-bit codes. When each block consists of four bits, one of combinations of the 1st and the 2nd bits, the 2nd and the 3rd bits, and the 3rd and the 4th bits is converted from 01 to 10 or from 10 to 01 to represent a 4-bit code by three bits. A reverse converting circuit 26 is used for a decoder 2, the amount of encoded data is compressed to decrease the sending speed of an output signal, and quality deterioration on the transmission line is prevented to reduce the storage capacity in data storage.
申请公布号 JPS6030219(A) 申请公布日期 1985.02.15
申请号 JP19830138291 申请日期 1983.07.28
申请人 FUJITSU KK 发明人 IHARA TETSUSHIGE
分类号 H03M3/02;H04B14/04 主分类号 H03M3/02
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